Omron CP1H CPU User Manual

223
High-speed Counters Section 5-2
■ Creating the Ladder Program
Programming in Cyclic Task
Use CTBL(882) to start the comparison operation with high-speed counter 0
and interrupt task 10.
Programming in Interrupt Task 10
Create the processing performed by interrupt task 10.
5-2-8 Additional Capabilities and Restrictions
Restrictions on High-
speed Counter Inputs
• The Phase-Z signal + Software reset method cannot be used when the
high speed counters are operating in Differential Phase or Pulse + Direc-
tion Input Modes and the origin search function is enabled for the pulse
output (in the PLC Setup). The Phase-Z signal + Software reset method
can be used when the high speed counters are operating in Incrementing
or Up/Down Input Modes.
D10005 to
D10008
All
#0000
Range 2 lower and upper limit values
(Not used and don’t need to be set.)
Range 2 settings
D10009 #FFFF Disables range 2.
~
D10014
D10019
D10024
D10029
D10034
#FFFF Set the fifth word for ranges 3 to 7 (listed at left) to #FFFF to
disable those ranges.
~
D10035 to
D10038
All
#0000
Range 8 lower and upper limit values
(Not used and don’t need to be set.)
Range 8 settings
D10039 #FFFF Disables range 8.
Word Setting Function
@
CTBL(8 82)
#0000
#0001
D10000
0 .01
W0.00
A 531.00
W0.00
W0.01
W0.01
A531.00 W 0.00
Use high-speed counter 0.
First comparison table word
Register a range comparison table and
start comparison operation.
0.00 (Measurement start input)
W0.01
END(001)
100.00 (Pass inspection: PL1 indicator)
A274.00 (in range)
A274.00 (in range)
100.01 (Fail inspection: PL2 indicator)

Omron CP1H CPU Specifications

General

Brand	Omron
Model	CP1H CPU
Category	Computer Hardware
Language	English