Motorola MPC823e User Manual

Data Cache
10-2 MPC823e REFERENCE MANUAL MOTOROLA
DATA CACHE
10
10.2 ORGANIZATION OF THE DATA CACHE
The data cache is a 8K two-way, set associative, physically addressed cache that has
16-byte line and a 32-bit data path to and from the load/store unit, which allows for a 4-byte
transfer per cycle.
Figure 10-1. Data Cache Organization
COMP
WAY0
28 312721200
BYTE SELECT
BIDIRECTIONAL MUX 2 -> 1
HIT0
HIT
EFFECTIVE ADDRESS
. .
. .
. .
. .
SET0
SET1
SET255
SET254
COMP
TAG0 W0 W1 W2 W3
VALID BIT
LOCK BIT
TAG1 W0 W1 W2 W3
TAG255 W0 W1 W2 W3
TAG254 W0 W1 W2 W3
. . . . . . . . . . . .
L
R
U
A
R
R
A
Y
. .
. .
. .
. .
HIT1
TO/FROM LINE BUFFER/
BURST BUFFER
4
W2
TAG0 W0 W1 W2 W3
WAY1
TAG1 W0 W1 W2 W3
TAG255 W0 W1 W2 W3
TAG254 W0 W1 W2 W3
. . . . . . . . . . . .
VALID BIT
LOCK BIT
W2
MMU
8
20
20
128 128
20
128
DIRTY BIT
DIRTY BIT
19

Motorola MPC823e Specifications

General

Brand	Motorola
Model	MPC823e
Category	Computer Hardware
Language	English