Motorola MPC823e User Manual

Memory Management Unit
MOTOROLA MPC823e REFERENCE MANUAL 11-15
MEMORY MANAGEMENT
11
UNIT
11.6 PROGRAMMING THE MEMORY MANAGEMENT UNIT
The memory management unit implements specific operations using control and status
registers, which can be accessed with the PowerPC mtspr/mfspr instructions. In addition,
the PowerPC tlbie and tlbia architecture instructions are supported. The memory
management unit registers must be accessed when both MSR
IR
=0 and MSR
DR
=0. No
similar restriction exists for the tlbie and tlbia instructions.
Figure 11-4. Organization of the Memory Management Unit Registers
MD_CTR
MI_CTR
MD_AP
MI_AP
M_CASID
Current Address Space ID
MD_EPNMI_EPN
MD_TWCMI_TWC
MD_RPNMI_RPN
Instruction MMU Real Address
M_TWB
M_TW
MD_DCAMMI_DCAM
MD_DRAM0MI_DRAM0
MD_DRAM1MI_DRAM1
CONFIGURATION REGISTERS:
TABLE WALK REGISTERS:
DEBUG REGISTERS:
Data MMU Control
Instruction MMU Control
Data MMU Access Protection
Instruction MMU Access Protection
Data MMU Effective AddressInstruction MMU Effective Address
Data MMU Table Walk ControlInstruction MMU Table Walk Control
Data MMU Real Address
MMU Table Walk Base
MMU Table Walk Scratch
Data MMU Debug CAMInstruction MMU Debug CAM
Data MMU Debug RAM0Instruction MMU Debug RAM0
Data MMU Debug RAM1Instruction MMU Debug RAM1
INSTRUCTION MMU REGISTERS
DATA MMU REGISTERS

Motorola MPC823e Specifications

General

Brand	Motorola
Model	MPC823e
Category	Computer Hardware
Language	English