Motorola MPC823e User Manual

External Bus Interface
13-28 MPC823e REFERENCE MANUAL MOTOROLA
EXTERNAL BUS
13
INTERFACE
Figure 13-20 illustrates the basic protocol for bus arbitration. For more information, see
Section 12.12.1.1 SIU Module Configuration Register.
13.4.6.1 BUS REQUEST SIGNAL. The potential bus master asserts the BR
signal to
request bus mastership. BR
must be negated once the bus is granted, the bus is not busy,
and the new master can drive the bus. If more requests are pending, the master can keep
asserting its bus request as long as needed. When configured for external central
arbitration, the MPC823e drives this signal when it needs bus mastership. When the internal
on-chip arbiter is used, this signal is an input to the internal arbiter and must be driven by
the external bus master.
Figure 13-20. Bus Arbitration Flowchart
REQUESTING DEVICE ARBITER
REQUEST THE BUS
1. ASSERT BR
TERMINATE ARBITRATION
1. NEGATE BG
(MAY CHOOSE TO
1. WAIT FOR BB
TO BE
3. NEGATE BR
KEEP IT ASSERTED TO PARK
BUS MASTER)
OPERATE AS BUS MASTER
1. PREFORM DATA TRANSFER
RELEASE BUS MASTERSHIP
1. NEGATE BB
ACKNOWLEDGE BUS MASTERSHIP
NEGATED
2. ASSERT BB
TO BECOME NEXT
MASTER
GRANT BUS ARBITRATION
1. ASSERT BG

Motorola MPC823e Specifications

General

Brand	Motorola
Model	MPC823e
Category	Computer Hardware
Language	English