Motorola MPC823e User Manual

External Bus Interface
13-38 MPC823e REFERENCE MANUAL MOTOROLA
EXTERNAL BUS
13
INTERFACE
13.4.10 Storage Reservation Protocol
The MPC823e storage reservation protocol supports multilevel bus structure. For each local
bus, storage reservation is handled by the local reservation logic. The protocol tries to
optimize reservation cancellation so that a PowerPC processor is notified of storage
reservation loss on a remote bus only when it has issued a stwcx cycle to that address. In
other words, the reservation loss indication comes as part of the stwcx cycle. This method
avoids the need to have fast storage reservation loss indication signals routed from every
remote bus to every PowerPC master.
The storage reservation protocol makes the following assumptions:
• Each processor has, at most, one reservation “flag”
• lwarx sets the reservation “flag”
• lwarx by the same processor clears the reservation “flag” related to a previous lwarx
instruction and again sets the reservation “flag”
• stwcx by the same processor clears the reservation “flag”
• A store by the same processor does not clear the reservation “flag”
• Some other processor (or other mechanism) store to the same address as an existing
reservation clears the reservation “flag”
• If the storage reservation is lost it is guaranteed that stwcx will not modify the storage

Motorola MPC823e Specifications

General

Brand	Motorola
Model	MPC823e
Category	Computer Hardware
Language	English