Chapter 2 _______________________________________________ Introduction and Specifications
VAISALA_______________________________________________________________________ 21
transforms, or random phase techniques. Since the IFDR is a networked
device, the digital I and Q data can be received by parallel signal
processors in real-time. This allows a hardware topology that has many
advantages that are yet to be explored.
Aside from the open hardware approach, the RVP900 has an open software
approach; it runs in a Linux operating system. The code is structured, and
public APIs are provided, so that research customers can modify or replace
existing algorithms, or write their own software using the RVP900
software structure as a foundation to build on.
The advantage of the open hardware and software PCI approach is reduced
cost and the ability for customers to maintain, upgrade, and expand the
processor by purchasing standard, low-cost PC components from local
sources.
2.4 Standard LAN Interconnection for Data
Transfer or Parallel Processing
For communication with the outside world, the RVP900 supports a
standard 10/100/1000 BaseT Ethernet. For most applications, the
IRIS/Radar software is installed on the same PC. Moment results (Z, T, V,
and W) are transferred internally; however, the 100 BaseT Ethernet is used
to transfer moment results (Z, T, V, and W) to third-party applications host
computer (for example, a product generator). The gigabit Ethernet is also
sufficiently fast enough to allow UDP broadcast of the I and Q values for
archiving and/or parallel processing. In other words, a completely separate
signal processor can ingest and process the I and Q values generated by the
RVP900.
2.5 System Configuration Concepts
The hardware building blocks of an RVP900 system are:
- RVP901
â„¢
IF Digitizer Receiver (IFDR)—A separate sealed unit
from electrical interference and environmental conditions. It is
usually mounted inside the receiver cabinet, but the new
multi-functionality allows new opportunities of locating the device.
The IFDR contains all the functionality of the RVP8 PCI cards and
IFDR within the same footprint.
The primary input to the IFDR is the received IF signal. The IFDR has
five identical 16-bit A/D convertors to sample the transmit pulse and
up to four receiver channels. An external clock may be used to phase
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