USER’S MANUAL__________________________________________________________________
72 __________________________________________________________________ M211322EN-D
bin spacing is specified in meters and are always within half a clock
period of the ideal value. The bins can also be placed precisely in
range, by choosing a clock period that is an integer multiple of the
desired spacing.
- Maximum Length of FIR Downconversion Filters—The FIR
filters that compute (I,Q) time series from raw IF samples must
process those samples at the acquisition clock rate. A filter of a given
length in microseconds must contain a greater number of taps
(coefficients) as the sample rate increases. For very long filters
(greater than 40 μsec), it may sometimes be necessary to limit the
clock rate, in order to achieve the desired impulse response length.
The Mt<n> and Ps menus are helpful in determining the maximum
length filter that can be achieved for a given RVP900 processing
mode (affected by single/dual polarization, range bin spacing, etc).
- Null Frequency Bands in Synthesized Tx Output—When a
synthesized Tx waveform is generated by the RVP900, there are
certain constraints on the output IF frequency and clock frequency.
The output frequency can not be within the interval of frequencies
0.4 f to 0.6 f, where "f" is the sample clock rate.
The RVP900 setup menus are helpful in cross-checking many of the above
constraints. However, it is ultimately the responsibility of the system
installer to choose a sample clock frequency that achieves the best set of
trade-offs at each radar site.
3.2.9 External Pre-Trigger Input
Users may supply the RVP900 with their own CMOS-level pre-trigger for
installations in which adequate trigger control already exists. The trigger
input is provided on the IFDR TRIG-A or TRIG-B SMA connector J8 and
J15, or on a TTL or RS-422 I/O line on J3 or J6. The choice is made in the
softplane.conf file.
The trigger input uses CMOS levels (1.5 V maximum low, 2.5 V minimum
high) for improved noise immunity. The SMA inputs may also be driven
as high as +100 V or as low as -100 V, without damage. This makes it
easier to connect to existing high-voltage trigger distribution systems. The
rising or falling edge of this external trigger signal is interpreted by the
RVP900 as the pretrigger point. The actual pulse width of the signal does
not matter. The delay to range zero is configured through the TTY Setups
(see Section 4.2.5 Mt<n>— Triggers for Pulsewidth #n on page 117). The
other trigger outputs are then synchronized to the input trigger. The
synchronization jitter between the user pretrigger and the other trigger
outputs are less than the period of the A/D sampling clock, for example,
10 nanoseconds at a 100 MHz rate.
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