Models 2500 and 2502 User’s Manual Status Structure 14-3
Figure 14-1
Model 2500 status register structure
3
5
6
Cal
9
10
11
12
13
14
15
Condition
Register
(Always Zero)
3
5
6
9
10
12
13
14
15
Event
Register
3
5
6
9
10
12
13
14
15
Event
Enable
Register
&
&
&
&
&
&
&
&
&
&
&
&
&
&
&
&
Logical
OR
7
8
12
13
15
Condition
Register
7
8
12
13
15
Event
Register
7
8
12
13
15
Event
Enable
Register
&
&
&
&
&
&
&
&
&
&
&
&
&
&
&
&
Logical
OR
EAV
QSB
MAV
ESB
RQS/MSS
OSB
Status
Byte
Register
1
EAV
QSB
MAV
ESB
6
OSB
Service
Request
Enable
Register
&
&
&
&
&
&
&
Logical
OR
*STB?
*SRE
*SRE?
Master Summary Status (MSS)
MSB = Measurement Summary Bit
EAV = Error Available
QSB = Questionable Summary Bit
MAV = Message Available
ESB = Event Summary Bit
RQS/MSS = Request for Service/Master Summary Staus
OSB = Operation Summary Bit
Error Queue
Output Queue
Note : RQS bit is in serial poll byte,
MSS bit is in *STB? response.
1
14 14
OPC
QYE
DDE
EXE
CME
URQ
PON
8
9
12
13
15
Register
8
9
12
13
15
Register
&
&
&
&
&
&
&
&
&
&
&
&
&
&
&
&
Logical
OR
(Always Zero)
Operation Complete
Query Error
Device Specific Error
Execution Error
Command Error
User Request
Power On
OPC
QYE
DDE
EXE
CME
URQ
PON
*ESR?
*ESE?
MSB MSB
15
(Always Zero)
15
Event
Register
15
Event
Enable
Register
&
&
&
&
&
&
&
&
&
&
&
&
&
&
&
&
Logical
OR
Condition
Register
RAV
RAV RAV
Reading Available
11
Cal
Cal
Calibration Summary
222
999
111
4
4
4
0
1
2
0
1
2
0
1
2
ROF
ROF ROF
Reading Overflow
Buffer Full
Warn
Command Warning
Warn
Warn
10
10
*ESE
Status
Enable
Standard
Event
BFL
BFL
BFL
Buffer Available
BAV
BAV
BAV
Limits Pass LP
LP
LP
L3
L2
L1
L1
L1
Limit 1 Summary
4
4
4
Trig
Trig
Trig
Arm
Arm
Arm
Idle
Idle Idle
Waiting for Arm
Idle
Cal
Cal
Cal
Calibrating
Operation
Questionable
Questionable
Questionable
7
7
7
Status
Standard
Event
Operation
Operation
Swp
Swp
Swp
Sweeping
Measurement
Measurement
Measurement
L4
LFH
Output Enable
OE
12
12
12
Src 1 Compliance
S1C
11
11
11 11
11
11
11
Waiting for Trigger
10
10 10
Limit 2 Summary
Limit 3 Summary
Limit 4 Summary
Limit Fail High
L2 L2
L3 L3
L4 L4
S1C
S1C
Src 2 Compliance
S2C S2C S2C
LFH LFH
OE OE
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