Debug and Strapping
Jetson AGX Xavier Series Product DG-09840-001_v2.5 | 118
15.2.1 JTAG
JTAG is not required but may be useful for new design bring up or for boundary scan.
Table 15-1. Jetson AGX Xavier JTAG Pin Description
Pin #
Module Pin
Name
SoC Signal Usage/Description
Usage on NVIDIA
Carrier Board
Direction
Pin Type
A60 JTAG_TCK JTAG_TCK
JTAG Test Clock. Pulled to GND through
100kΩ resistor on module.
JTAG Connector
Input
CMOS – 1.8V
B60 JTAG_TDI JTAG_TDI JTAG Test Data In
D58 JTAG_TDO JTAG_TDO JTAG Test Data Out Output
G61 JTAG_TRST_N JTAG_TRST_N
JTAG Test Reset. Low for normal operation
or ARM JTAG debug mode. High for scan test
mode. Pulled to GND through 100kΩ resistor
on module.
Unused Input
G60 NVDBG_SEL NVDBG_SEL
NVIDIA Debug Select. Pulled to GND through
100kΩ resistor on module.
Unused – Driven to GND
Input
H59 NVJTAG_SEL NVJTAG_SEL
NVIDIA JTAG Select. Low for normal
operation or ARM JTAG debug mode. High
for scan test mode. Pulled to GND through
100kΩ resistor on module.
Input
Notes:
1. In the Type/Dir column, Output is from Jetson AGX Xavier. Input is to Jetson AGX Xavier. Bidir is for Bidirectional signals.
Table 15-2. JTAG Signal Connections
Module Pin
Name (other)
Type Termination Description
I
JTAG Mode Select: Connect to TMS pin of connector
I 100kΩ to
JTAG Clock: Connect to TCK pin of connector
O
JTAG Data Out: Connect to TDO pin of connector
I
JTAG Data In: Connect to TDI pin of connector
I
JTAG Return Clock: Connect to RTCK pin of connector
I
100kΩ to
GND and 0.1uF to
GND on module
JTAG General Purpose Pin #0: Leave unconnected for normal
or ARM JTAG operation.
Connect to
pin of connector or
similar for Boundary Scan test mode. See the
Jetson AGX Xavier
Boundary Scan Requirements and Usage
document for details.
NVJTAG_SEL 100kΩ to GND on module NVIDIA JTAG Select: Used as select
Normal operation: Must be low, so leave unconnected (on-
module pulldown will keep low).
Scan test mode: Connect NVJTAG_SEL to VDD_1V8. See the
Boundary Scan Test Mode section and the
Jetson AGX Xavier
Boundary Scan Requirements and Usage
document for details.