Jetson AGX Xavier Series Product DG-09840-001_v2.5 | 127
Chapter 19. General Layout Guidelines
Trace and via characteristics play an important role in signal integrity and power distribution
on Jetson AGX Xavier. Vias can have a strong impact on power distribution and signal noise, so
careful planning must take place to ensure designs meet NVIDIA’s via requirements. Trace
length and impedance determine signal propagation time and reflections, both of which can
greatly improve or reduce the performance of Jetson AGX Xavier. Trace and via requirements
for each signal type can be found in the corresponding chapter; this chapter provides general
guidelines for via and trace placement.
19.1 Via Guidelines
The number of vias in the path of a given signal, power supply line, or ground line can greatly
affect the performance of the trace. Via placement can make differences in current carrying
capability, signal integrity (due to reflections and attenuation), and noise generation, all of
which can impact the overall performance of the trace. The following guidelines provide basic
advice for proper use of vias.
19.1.1 Via Count and Trace Width
As a rule, each ampere of current requires at least two micro-vias.
19.1.2 Via Placement
If vias are not placed carefully, they can severely degrade the robustness of a board’s power
plane. In standard deigns that do not use blind or buried vias, construction of a via entails
drilling a hole that cuts into the power and ground planes. Thus, incorrect via placement
affects the amount of copper available to carry current to the power balls of the IC.
19.1.3 Via Placement and Power and Ground
Corridors
Vias should be placed so that sufficiently wide power corridors are created for good power
distribution, as show in Figure 19-1.
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