32 Reciter Circuit Description TB8100 Service Manual
© Tait Electronics Limited September 2006
CODECs
The three CODECs provide the audio frequency analogue interface to the
reciter. There are six analogue input and six analogue output paths. The
sample rate on all paths is 25kSPS and the sampling resolution is 16 bits.
The CODEC inputs are as follows:
â– two input signals from the frequency control loop (FCL)
â– balanced line input
â– unbalanced line input
â– microphone input
â– synthesizer loop control voltage.
The CODEC outputs are as follows:
â– VCO voltage control line
â– VCXO voltage control line
â– balanced line output
â– unbalanced line output
â– speaker output
â– RSSI voltage indicator.
2.1.3 Reduced Instruction Set Computer (RISC)
Refer to Figure 2.3 on page 33.
Hardware and I/O The RISC processor engine is a Samsung S3C3410X processor with a
40MHz external clock. It has 4 megabytes of flash memory containing the
following:
â– bootloader
â– application code
â– DSP code
â– non-volatile data
â– 2 megabytes of RAM for run-time variables.
The discrete digital inputs and outputs are as follows:
â– chip select signals to synthesizers
â– out-of-lock signals from synthesizers
â– external reference detection
â– internal/external reference selection
â– Rx Gate output
â– Tx Relay output
â– reciter hex switch
â– reciter alarm LED
â– DIP switch for manufacturing testing