RL78/G1H CHAPTER 11 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
R01UH0575EJ0120 Rev. 1.20 Page 269 of 920
Dec 22, 2016
11.2 Configuration of Clock Output/Buzzer Output Controller
The clock output/buzzer output controller includes the following hardware.
11.3 Registers Controlling Clock Output/Buzzer Output Controller
11.3.1 Clock output select registers n (CKSn)
These registers set output enable/disable for clock output or for the buzzer frequency output pin (PCLBUZn), and
set the output clock.
Select the clock to be output from the PCLBUZn pin by using the CKSn register.
The CKSn register are set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Table 11 - 1 Configuration of Clock Output/Buzzer Output Controller
Item Configuration
Control registers Clock output select registers n (CKSn)
Port mode register 4 (PM14)
Port register 14 (P14)