RL78/G1H CHAPTER 15 SERIAL INTERFACE IICA
R01UH0575EJ0120 Rev. 1.20 Page 451 of 920
Dec 22, 2016
15.5.2 Addresses
The address is defined by the 7 bits of data that follow the start condition.
An address is a 7-bit data segment that is output in order to select one of the slave devices that are connected to
the master device via the bus lines. Therefore, each slave device connected via the bus lines must have a
unique address.
The slave devices include hardware that detects the start condition and checks whether or not the 7-bit address
data matches the data values stored in the slave address register n (SVAn). If the address data matches the
SVAn register values, the slave device is selected and communicates with the master device until the master
device generates a start condition or stop condition.
Figure 15 - 21 Address
Note INTIICAn is not issued if data other than a local address or extension code is received during slave device operation.
Addresses are output when a total of 8 bits consisting of the slave address and the transfer direction described in
15.5.3 Transfer direction specification are written to the IICA shift register n (IICAn). The received addresses
are written to the IICAn register.
The slave address is assigned to the higher 7 bits of the IICAn register.
15.5.3 Transfer direction specification
In addition to the 7-bit address data, the master device sends 1 bit that specifies the transfer direction.
When this transfer direction specification bit has a value of “0”, it indicates that the master device is transmitting
data to a slave device. When the transfer direction specification bit has a value of “1”, it indicates that the master
device is receiving data from a slave device.
Figure 15 - 22 Transfer Direction Specification
Note INTIICAn is not issued if data other than a local address or extension code is received during slave device
operation.
Remark n = 0, 1
A6 A5 A4 A3 A2 A1 A0 R/W
Address
Note
SCLAn
SDAAn
INTIICAn
123456789
SCLAn
SDAAn
Transfer direction specification
Note
INTIICAn
123456789
A6 A5 A4 A3 A2 A1 A0 R/W