Renesas RL78/G1H User Manual

RL78/G1H CHAPTER 26 OPTION BYTE
R01UH0575EJ0120 Rev. 1.20 Page 799 of 920
Dec 22, 2016
26.2 Format of User Option Byte
The format of user option byte is shown below.
Figure 26 - 1 Format of User Option Byte (000C0H/010C0H)
Note 1. Set the same value as 000C0H to 010C0H when the boot swap operation is used because 000C0H is
replaced by 010C0H.
Note 2. The window open period is 100% when WDSTBYON = 0, regardless the value of the WINDOW1 and
WINDOW0 bits.
Address: 000C0H/010C0H
Note 1
76543210
WDTINT WINDOW1 WINDOW0 WDTON WDCS2 WDCS1 WDCS0 WDSTBYON
WDTINT Use of interval interrupt of watchdog timer
0 Interval interrupt is not used.
1 Interval interrupt is generated when 75% + 1/2 f
IL of the overflow time is reached.
WINDOW1 WINDOW0
Watchdog timer window open period
Note 2
0 0 Setting prohibited
0150%
10
75%
Note 3
1 1 100%
WDTON Operation control of watchdog timer counter
0 Counter operation disabled (counting stopped after reset)
1 Counter operation enabled (counting started after reset)
WDCS2 WDCS1 WDCS0
Watchdog timer overflow time
(f
IL = 17.25 kHz (MAX.))
000
2
6
/fIL (3.71 ms)
001
2
7
/fIL (7.42 ms)
010
2
8
/fIL (14.84 ms)
011
2
9
/fIL (29.68 ms)
100
2
11
/fIL (118.72 ms)
101
2
13
/fIL (474.90 ms)
110
2
14
/fIL (949.80 ms)
111
2
16
/fIL (3799.19 ms)
WDSTBYON Operation control of watchdog timer counter (HALT/STOP mode)
0
Counter operation stopped in HALT/STOP mode
Note 2
1 Counter operation enabled in HALT/STOP mode

Renesas RL78/G1H Specifications

General

Brand	Renesas
Model	RL78/G1H
Category	Microcontrollers
Language	English