RL78/G1H CHAPTER 13 A/D CONVERTER
R01UH0575EJ0120 Rev. 1.20 Page 319 of 920
Dec 22, 2016
13.9 Cautions for A/D Converter
(1) Operating current in STOP mode
Shift to STOP mode after stopping the A/D converter (by setting bit 7 (ADCS) of A/D converter mode register 0
(ADM0) to 0). The operating current can be reduced by setting bit 0 (ADCE) of the ADM0 register to 0 at the
same time.
To restart from the standby status, clear bit 0 (ADIF) of interrupt request flag register 1H (IF1H) to 0 and start
operation.
(2) Input range of ANIn pins
Observe the rated range of the ANIn pins input voltage. If a voltage exceeding V
DD and AVREFP or below VSS and
AVREFM (even in the range of absolute maximum ratings) is input to an analog input channel, the converted value
of that channel becomes undefined. In addition, the converted values of the other channels may also be affected.
(3) Conflicting operations
<1> Conflict between the A/D conversion result register (ADCR, ADCRH) write and the ADCR or ADCRH
register read by instruction upon the end of conversion
The ADCR or ADCRH register read has priority. After the read operation, the new conversion result is
written to the ADCR or ADCRH registers.
<2> Conflict between the ADCR or ADCRH register write and the A/D converter mode register 0 (ADM0) write,
the analog input channel specification register (ADS), or A/D port configuration register (ADPC) write upon
the end of conversion
The ADM0, ADS, or ADPC registers write has priority. The ADCR or ADCRH register write is not
performed, nor is the conversion end interrupt signal (INTAD) generated.
(4) Noise countermeasures
To maintain the 10-bit resolution, attention must be paid to noise input to the AV
REFP, VDD, ANI0 to ANI2, ANI13,
ANI14, and ANI19 pins.
<1> Connect a capacitor with a low equivalent resistance and a good frequency response to the power supply.
<2> The higher the output impedance of the analog input source, the greater the influence. To reduce the noise,
connecting external capacitor as shown in Figure 13 - 30 is recommended.
<3> Do not switch these pins with other pins during conversion.
<4> The accuracy is improved if the HALT mode is set immediately after the start of conversion.
Figure 13 - 30 Analog Input Pin Connection
ANI0 to ANI2, ANI13, ANI14, ANI19
Reference
voltage
input
C = 10 pF to 0.1 µF
AV
REFP or VDD
If there is a possibility that noise equal to or higher than AVREFP and
V
DD or equal to or lower than AVREFM and VSS may enter, clamp with
a diode with a small V
F value (0.3 V or lower).
To Next Page
Loading...
Need help?
General
