RL78/G1H CHAPTER 24 SAFETY FUNCTIONS
R01UH0575EJ0120 Rev. 1.20 Page 789 of 920
Dec 22, 2016
24.3.7 Frequency detection function
The IEC60730 standard mandates checking that the oscillation frequency is correct.
By using the CPU/peripheral hardware clock frequency (fCLK) and measuring the pulse width of the input signal
to channel 1 of the timer array unit 0 (TAU0), whether the proportional relationship between the two clock
frequencies is correct can be determined.
Note that, however, if one or both clock operations are stopped, the proportional relationship between the clocks
cannot be determined.
<Clocks to be compared>
<1> CPU/peripheral hardware clock frequency (f
CLK):
• High-speed on-chip oscillator clock (f
IH)
• High-speed system clock (fMX)
<2> Input to channel 1 of the timer array unit 0
• Timer input to channel 1 (TI01)
• Low-speed on-chip oscillator clock (fIL: 15 kHz (TYP.))
• Subsystem clock (f
SUB)
Note
Figure 24 - 13 Configuration of Frequency Detection Function
If pulse interval measurement results in an abnormal value, it can be concluded that the clock frequency is
abnormal.
For how to execute pulse interval measurement, see 7.8.3 Operation as input pulse interval measurement.
Note Can only be selected in the products incorporating the subsystem clock.
Watchdog timer (WDT)
High-speed system clock (fMX)
High-speed on-chip
oscillator clock (f
IH)
Subsystem clock (fSUB)
Note
Low-speed on-chip
oscillator clock
(15 kHz (TYP.))
Channel 1 of timer
array unit 0
(TAU0)
TI01
SelectorSelector
fCLK
fIL
<2>
<1>
To Next Page
Loading...
Need help?
General
