Renesas RL78/G15 - 12.5 Operation of Simplified SPI (CSI00, CSI01) Communication

RL78/G15 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 397 of 765
Mar 7, 2023
12.5 Operation of Simplified SPI (CSI00, CSI01) Communication
This is a clocked communication function that uses three lines: serial clock (SCK) and serial data (SI and SO) lines.
[Data transmission/reception]
●
Data length of 7 or 8 bits
●
Phase control of transmit/receive data
●
MSB/LSB first selectable
[Clock control]
●
Master/slave selection
●
Phase control of I/O clock
●
Setting of transfer period by prescaler and internal counter of each channel
●
Maximum transfer rate
Note 1
During master communication: Max. f
CLK
/4
During slave communication: Max. f
MCK
/6
[Interrupt function]
●
Transfer end interrupt/buffer empty interrupt
[Error detection flag]
●
Overrun error
Note 1. Set up the transfer rate within a range satisfying the SCK cycle time (t
KCY
). For details, see CHAPTER 23
ELECTRICAL SPECIFICATIONS (T
A
= −40 to +85°C) and CHAPTER 24 ELECTRICAL SPECIFICATIONS
(T
A
= −40 to +105°C, T
A
= −40 to +125°C).