RL78/G15 CHAPTER 3 CPU ARCHITECTURE
R01UH0959EJ0110 Rev.1.10 Page 56 of 765
Mar 7, 2023
3.2 Memory Space
Products in the RL78/G15 can access a 1-MB address space. Figure 3-1 and Figure 3-2 show the memory maps.
Figure 3-1. Memory Map (R5F120x8 (x = 0, 1, 4, 6))
RAM
Note 1
1 KB
Special function register (
SFR)
256 bytes
FFFFFH
00000H
FFF00H
FFEFFH
FFEE
0H
FFEDFH
General-purpose register
32 bytes
F
0800H
F07
FFH
Special function register (2nd SFR)
2 KB
F0000H
EFFFFH
02000H
01FFFH
FFB00H
FFAFFH
F2000H
F1FFFH
Program
memory
space
Data
memory
space
01FFFH
Vector table area
128 bytes
00080H
0007FH
00000H
CALLT table area
64 bytes
Option byte area
4 bytes
000C0H
000BFH
000C4H
000C3H
Program area
On-chip debug security
ID setting area
10 bytes
000CEH
000CDH
F9400H
F93FFH
09000H
08FFFH
09400H
093FFH
Reserved
Reserved
CF mirror
6 KB
Reserved
F9000H
F8FFFH
DF mirror
1 KB
Reserved
Data flash memory
1 KB
Code flash memory
8 KB
Note 1. Instructions can be executed from the RAM area excluding the general-purpose register area.