RL78/G15 CHAPTER 23 ELECTRICAL SPECIFICATIONS (T
A
= −40 to +85°C)
R01UH0959EJ0110 Rev.1.10 Page 724 of 765
Mar 7, 2023
23.5.2 Serial interface IICA
[T
A
= −40 to +85°C, 2.4 V ≤ V
DD
≤ 5.5 V, V
SS
= 0 V]
Item Symbol Condition Standard Mode Fast Mode Unit
MIN. MAX. MIN. MAX.
SCLA0 clock frequency f
SCL
Fast mode:
f
CLK
≥ 3.5 MHz
0 400 kHz
Standard mode:
f
CLK
≥ 1 MHz
0 100 kHz
Setup time of restart condition t
SU:STA
4.7 0.6 µs
Hold time
Note 1
t
HD:STA
4.0 0.6 µs
Hold time when SCLA0 = “L” t
LOW
4.7 1.3 µs
Hold time when SCLA0 = “H” t
HIGH
4.0 0.6 µs
Data setup time (reception) t
SU:DAT
250 100 ns
Data hold time (transmission)
Note 2
t
HD:DAT
0 3.45 0 0.9 µs
Setup time of stop condition t
SU:STO
4.0 0.6 µs
Bus-free time t
BUF
4.7 1.3 µs
Note 1. The first clock pulse is generated after this period when the start or restart condition is detected.
Note 2. The maximum value (MAX.) of t
HD:DAT
applies to normal transfer and a wait is inserted at the ACK
(acknowledge) timing.
Remark The maximum value of C
b
(communication line capacitance) and the value of R
b
(communication line pull-up
resistance) at that time in each mode are as follows.
Standard mode: C
b
= 400 pF, R
b
= 2.7 kΩ
Fast mode: C
b
= 200 pF, R
b
= 1.7 kΩ
IICA serial transfer timing
t
LOW
t
R
t
HIGH
t
F
t
HD:STA
t
BUF
Stop
condition
t
HD:DAT
SCLA0
SDAA0
Start
condition
Restart
condition
Stop
condition
t
SU:DAT
t
SU:STA
t
HD:STA
t
SU:STO
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