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Renesas RL78/G15 User Manual

Renesas RL78/G15
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RL78/G15 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 501 of 765
Mar 7, 2023
12.7.5 Calculating Transfer Rate
The transfer rate for simplified I
2
C (IIC00, IIC01) communication can be calculated by the following expressions.
(Transfer rate) =
{
Operation clock (f
MCK
) frequency of target channel
}
÷
(
SDRmn[15: 9] + 1
)
÷ 2
Caution SDRmn[15:9] must not be set to 00000000B. Set SDRmn[15:9] to 0000001B or greater.
The duty ratio of the SCL signal output by the simplified I
2
C is 50%. The I
2
C bus specifications define
that the low-level width of the SCL signal is longer than the high-level width. If 400 kbps (fast mode)
or 1 Mbps (fast mode plus) is specified, therefore, the low-level width of the SCL output signa
becomes shorter than the value specified in the I
2
C bus specifications. Make sure that the
SDRmn[15:9] value satisfies the I
2
C bus specifications.
Remark 1. The value of SDRmn[15:9] is the value of bits 15 to 9 of the SDRmn register (0000001B to 1111111B) and
therefore is 1 to 127.
Remark 2. m: Unit number (m = 0), n: Channel number (n = 0, 1), mn = 00, 01
The operation clock (f
MCK
) is determined by serial clock select register m (SPSm) and bit 15 (CKSmn) of serial mode
register mn (SMRmn).

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Renesas RL78/G15 Specifications

General IconGeneral
BrandRenesas
ModelRL78/G15
CategoryMicrocontrollers
LanguageEnglish

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