RL78/G15 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 444 of 765
Mar 7, 2023
12.5.6 Slave Transmission/Reception
Slave transmission/reception is that the RL78 microcontroller transmits/receives data to/from another device in the state
of a transfer clock being input from another device.
Simplified SPI CSI00 CSI01
Target channel Channel 0 of SAU0 Channel 1 of SAU0
Pins used SCK00, SI00, SO00 SCK01, SI01, SO01
Interrupt INTCSI00 INTCSI01
Transfer end interrupt (in single-transfer mode) or buffer empty interrupt (in continuous transfer mode) can be
selected.
Error detection flag Overrun error detection flag (OVFmn) only
Transfer data length 7 or 8 bits
Transfer rate Max. f
MCK
/6 [Hz]
Note 1, Note 2
Data phase Selectable by the DAPmn bit of the SCRmn register
●
DAPmn = 0: Data I/O starts at the start of the operation of the serial clock.
●
DAPmn = 1: Data I/O starts half a clock cycle before the start of the serial clock operation.
Clock phase Selectable by the CKPmn bit of the SCRmn register
●
CKPmn = 0: Non-reverse
●
CKPmn = 1: Reverse
Data direction MSB or LSB first
Note 1. Because the external serial clock input to the SCK00 and SCK01 pins is sampled internally and used, the
fastest transfer rate is f
MCK
/6 [Hz].
Note 2. Use this operation within a range that satisfies the conditions above and the peripheral functions
characteristics specified in the electrical characteristics. For details, see CHAPTER 23 ELECTRICAL
SPECIFICATIONS (T
A
= −40 to +85°C) and CHAPTER 24 ELECTRICAL SPECIFICATIONS (T
A
= −40 to
+105°C, T
A
= −40 to +125°C).
Remark 1. f
MCK
: Operation clock frequency of target channel
f
SCK
: Serial clock frequency
Remark 2. m: Unit number (m = 0), n: Channel number (n = 0, 1), mn = 00, 01
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