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Renesas RL78/G15 - Direct Addressing

Renesas RL78/G15
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RL78/G15 CHAPTER 3 CPU ARCHITECTURE
R01UH0959EJ0110 Rev.1.10 Page 83 of 765
Mar 7, 2023
3.5.3 Direct addressing
[Function]
Direct addressing uses immediate data in the instruction word as an operand address to directly specify the target
address.
[Operand format]
Identifier Description
!addr16
Label or 16-bit immediate data
(only the space from F0000H to FFFFFH is specifiable)
ES:!addr16
Label or 16-bit immediate data
(higher 4-bit addresses are specified by the ES register)
Figure 3-17. Example of !addr16
Instruction code
OP-code
Low Addr.
High Addr.
Target memory
FFFFFH
Memory
F0000H
<1>
16-bit address <1> in the 64-Kbyte area from F0000H to
FFFFFH specifies the target location
(for use in access to the 2nd SFRs etc.).
MOV !addr16,
<1>
A
Figure 3-18. Example of ES:!addr16
Instruction code
OP-code
Low Addr.
High Addr.
Target memory
FFFFFH
Memory
00000H
<2>
The ES register <1> specifies a 64-Kbyte area within the
overall 1-Mbyte space as the four higher-order bits, X, of the
address range.
A 16-bit address <2> in the area from X0000H to XFFFFH and
the ES register <1> specify the target location; this is used for
access to fixed data other than that in mirrored areas.
ES:
<1>
!addr16
<2>
Specifies the address in memory
Area from
X0000H to
XFFFFH
ES
X0000H
Specifies a 64-Kbyte area

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