Starting UART communication
End of UART
Writing 1 to the STmn bit
Setting storage area of the receive data, number of communication data
(storage area, reception data pointer, number of communication data
are optionally set on the internal RAM by the software)
Clear interrupt request flag (xxIF), reset interrupt mask (xxMK) and
set interrupt enable (EI)
Setting receive data
Enables interrupt
RETI
SAU initial setting
Starting reception if start bit is detected
Main routine Main routine
Interrupt (mask)
Check the number of communication data, and determine
the completion of reception
Reception completed?
No
When receive complete, transfer end
interrupt is generated
Yes
Wait for receive completes
Read receive data then writes to storage area.
Update receive data pointer and number of
communication data.
Interrupt processing routine
Indicating normal reception?
Yes
Error processing
Reading receive data from
the SDRmn[7:0] bits (RXDq register) (8 bits) or
the SDRmn[8:0] bits (9 bits)
Transfer end interrupt
No
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