Chapter 8
BLOCK DIAGRAMS FOR CONTROL LOGIC
This chapter provides the main block diagrams for the control logic of the FRENIC-MEGA series of inverters.
Contents
8.1
Symbols Used in Block Diagrams and their Meanings............................................................................. 8-1
8.2 Drive Frequency Command Block............................................................................................................ 8-2
8.3 Drive Command Block ............................................................................................................................. 8-4
8.4 Control Block............................................................................................................................................ 8-6
8.4.1 V/f control ......................................................................................................................................... 8-6
8.4.2 V/f control with speed sensor ........................................................................................................... 8-8
8.4.3 Vector control with/without speed sensor ....................................................................................... 8-10
8.5 PID Process Control Block..................................................................................................................... 8-12
8.6 PID Dancer Control Block ...................................................................................................................... 8-14
8.7 FMA/FMP Output Selector ..................................................................................................................... 8-16