Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1165 of 1823
Jul 31, 2019
RX23W Group 35. I
2
C-bus Interface (RIICa)
Figure 35.25 AASy Flag Set Timing with 10-Bit Address Format Selected
Figure 35.26 AASy Flag Set/Clear Timing with 7-Bit/10-Bit Address Formats Mixed
Read ICDRR register
(Dummy read [lower addresses])
Address match
TDRE
AASy
S
1
1
8
W
1
8
R
9
ACK
TRS
9
ACK
BBSY
TDRE
AASy
TRS
BBSY
RDRF
RDRF
234567 8 9
ACK
S
1 2345
Data
Address match
234567
1110
1
1
8
W
9
ACK
234567
1110
1
1
234567
1110
9
ACK
Sr1to8
[10-bit address format: Slave reception]
[10-bit address format: Slave transmission]
10-bit slave address (lower 8 bits)Upper 2 bits
Read ICDRR register
(Dummy read [lower addresses])
Receive data (lower addresses)
Upper 2 bits Lower 8 bits Upper 2 bits
Receive data (lower addresses)
R
SCL0
SDA0
SCL0
SDA0
Upper 2 bits
Address match
AAS1
AAS2
AAS0
BBSY
1 W11 10
Lower 8 bits
R/W
Address match
AAS1
AAS2
AAS0
BBSY
Address mismatchAddress match
WDATA 1 1110R/W
AAS1
AAS2
AAS0
BBSY
S
7-bit slave address (SARL0)
Address mismatch
Address match
DATAR/W 7-bit slave address (SARL1) R/W
Address match
Address mismatch
S 9Sr23456711
to
8 98 34567 981
2
S 9Sr23456711
to
8 98 34567 981
2
S 9Sr23456711
to
8 98 34567 981
2
7-bit slave address (SARL1)
Upper 2 bits
7-bit slave address (SARL0)
ACK
ACKACK ACK
ACK
ACKACK
[In the case of SARL0: 7-bit address, SARL1: 7-bit address, SAR2: 10-bit address (2)]
[In the case of
SARL0: 7-bit address, SARL1: 7-bit address, SAR2: 10-bit address (3)]
[In the case of
SARL0: 7-bit address, SARL1: 7-bit address, SAR2: 10-bit address (1)]
ACKACK
SCL0
SDA0
SCL0
SDA0
SCL0
SDA0

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English