R01UH0823EJ0100 Rev.1.00 Page 286 of 1823
Jul 31, 2019
RX23W Group 15. Interrupt Controller (ICUb)
15.2.16 NMI Pin Digital Filter Setting Register (NMIFLTC)
NFCLKSEL[1:0] Bits (NMI Digital Filter Sampling Clock)
These bits select the cycle of the digital filter sampling clock for the NMI pin interrupt.
The sampling clock cycle can be selected from among the PCLK (every cycle), PCLK/8 (once every eight cycles),
PCLK/32 (once every 32 cycles), and PCLK/64 (once every 64 cycles).
For details of the digital filter, see
section 15.4.7, Digital Filter.
Address(es): ICU.NMIFLTC 0008 7594h
b7 b6 b5 b4 b3 b2 b1 b0
——————NFCLKSEL[1:0]
Value after reset:
00000000
Bit Symbol Bit Name Description R/W
b1, b0 NFCLKSEL[1:0] NMI Digital Filter Sampling
Clock
b1 b0
0 0: PCLK
0 1: PCLK/8
1 0: PCLK/32
1 1: PCLK/64
R/W
b7 to b2 — Reserved These bits are read as 0. The write value should be 0. R/W
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