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Renesas RX Series User Manual

Renesas RX Series
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R01UH0823EJ0100 Rev.1.00 Page 929 of 1823
Jul 31, 2019
RX23W Group 32. USB 2.0 Host/Function Module (USBc)
32.3.3.3 BEMP Interrupt
On detecting a BEMP interrupt for the pipe whose PID[1:0] bits are set to 01b (BUF) by software, the USB sets the
corresponding BEMPSTS.PIPEnBEMP flag to 1. If the corresponding bit in the BEMPENB register has been set to 1 by
software, the USB sets the INTSTS0.BEMP flag to 1 and generates a USB interrupt.
The following describes the conditions on which the USB generates an internal BEMP interrupt request.
(1) For the pipe in the transmitting direction:
When the FIFO buffer of the corresponding pipe is empty on completion of transmission (including zero-length packet
transmission).
In single buffer mode, an internal BEMP interrupt request is generated simultaneously with the BRDY interrupt for the
pipe other than DCP. However, the internal BEMP interrupt request is not generated on any of the following conditions.
ï‚· When the CPU or DMAC/DTC has already started writing data to the FIFO buffer of the CPU on completion of
transmitting data from one FIFO buffer in double buffer mode.
ï‚·
When the buffer is cleared (emptied) by setting the PIPEnCTR.ACLRM or the BCLR bit in the port control register to
1.
ï‚· When IN transfer (zero-length packet transmission) is performed during the control transfer status stage while the
function controller is selected.
(2) For the pipe in the receiving direction:
When the successfully-received data packet size exceeds the specified maximum packet size.
In this case, the USB generates a BEMP interrupt request, sets the corresponding BEMPSTS.PIPEnBEMP flag to 1,
discards the received data, and modifies the setting of the PID[1:0] bits of the corresponding pipe to 11b (STALL).
Here, the USB returns no response when used as the host controller, and returns STALL response when used as the
function controller.
However, the internal BEMP interrupt request is not generated on any of the following conditions.
ï‚· When a CRC error or a bit stuffing error is detected in the received data.
ï‚· When a setup transaction is being performed,
Writing 0 to the BEMPSTS.PIPEnBEMP flag clears the status.
Writing 1 to the BEMPSTS.PIPEnBEMP flag has no effect.
Figure 32.11 shows the timing of BEMP interrupt generation when the function controller is selected.
Figure 32.11 Timing of BEMP Interrupt Generation (When Function Controller is Selected)
(1) Example of data transmission
(2) Example of data reception
IN Token Packet
OUT Token Packet
ACK HandshakeData Packet
STALL Handshake
Data Packet (Maximum
Packet size over)
Ready for transmission
Ready for write access
(there is no data to be
transmitted)
Note 1. The handshake is not used in isochronous transfers.
USB bus
FIFO buffer status
BEMP interrupt
(BEMPSTS.PIPEnBEMP flag)
*1
Packet transmitted by host device Packet transmitted by function device
USB bus
BEMP interrupt
(BEMPSTS.PIPEnBEMP flag)
A BEMP interrupt is generated
A BEMP interrupt is generated

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Renesas RX Series Specifications

General IconGeneral
BrandRenesas
ModelRX Series
CategoryMicrocontrollers
LanguageEnglish

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