R01UH0823EJ0100 Rev.1.00 Page 764 of 1823
Jul 31, 2019
RX23W Group 28. Realtime Clock (RTCe)
28.2 Register Descriptions
When writing to or reading from RTC registers, do so in accordance with section 28.6.5, Notes When Writing to and
Reading from Registers
.
If the value in an RTC register after a reset is given as x (undefined bits) in the list, it is not initialized by a reset. When
RTC enters the reset state or a low power consumption state during counting operations (i.e. while the RCR2.START bit
is 1), the year, month, day of the week, date, hours, minutes, seconds, and 64-Hz counters continue to operate. Note that
a reset generated during writing to or updating of a register might destroy the register value. In addition, do not allow the
chip to enter software standby mode immediately after setting any of these registers. For details, refer to
section 28.6.4,
Transitions to Low Power Consumption Modes after Setting Registers
.
28.2.1 64-Hz Counter (R64CNT)
The R64CNT counter is used in both calendar count mode and in binary count mode.
The 64-Hz counter (R64CNT) generates a period of one second by counting the 128-Hz reference clock.
The state in the sub-second range can be confirmed by reading this counter.
This counter is set to 00h by an RTC software reset or executing 30-second adjustment.
To read this counter, follow the procedure in
section 28.3.5, Reading 64-Hz Counter and Time.
Address(es): RTC.R64CNT 0008 C400h
b7 b6 b5 b4 b3 b2 b1 b0
— F1HZ F2HZ F4HZ F8HZ F16HZ F32HZ F64HZ
Value after reset:
0xxxxxxx
x: Undefined
Bit Symbol Bit Name Description R/W
b0 F64HZ 64 Hz Indicate the state between 1 Hz and 64 Hz of the sub-second digit. R
b1 F32HZ 32 Hz R
b2 F16HZ 16 Hz R
b3 F8HZ 8 Hz R
b4 F4HZ 4 Hz R
b5 F2HZ 2 Hz R
b6 F1HZ 1 Hz R
b7 — Reserved This bit is read as 0. Writing to this bit has no effect. R
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