Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 383 of 1823
Jul 31, 2019
RX23W Group 19. Data Transfer Controller (DTCa)
19.2.3 DTC Transfer Source Register (SAR)
SAR register is used to set the transfer source start address.
In full-address mode, 32 bits are valid.
In short-address mode, lower 24 bits are valid and upper 8 bits (b31 to b24) are ignored. The address of this register is
extended by the value specified by b23.
SAR register cannot be accessed directly from the CPU.
19.2.4 DTC Transfer Destination Register (DAR)
DAR register is used to set the transfer destination start address.
In full-address mode, 32 bits are valid.
In short-address mode, lower 24 bits are valid and upper 8 bits (b31 to b24) are ignored. The address of this register is
extended by the value specified by b23.
DAR register cannot be accessed directly from the CPU.
Address(es): (inaccessible directly from the CPU)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
Value after reset:
xxxxxxxxxxxxxxxx
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Value after reset:
xxxxxxxxxxxxxxxx
x: Undefined
Address(es): (inaccessible directly from the CPU)
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
Value after reset:
xxxxxxxxxxxxxxxx
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Value after reset:
xxxxxxxxxxxxxxxx
x: Undefined

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English