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R01UH0823EJ0100 Rev.1.00 Page 745 of 1823

Jul 31, 2019

RX23W Group 26. 8-Bit Timer (TMR)

26.5 Operation with Cascaded Connection

If the CSS[1:0] bits in either TMR0.TCCR or TMR1.TCCR are set to 11b, the TMR of the two channels are cascaded.

With this configuration, a single 16-bit timer could be used (16-bit counter mode) or compare matches of TMR0 could be

counted by TMR1 (compare match count mode).

This section describes unit 0. When the two units are cascade-connected, the operation of unit 1 differs in some respects

from that of unit 0.

26.5.1 16-Bit Count Mode

When the TMR0.TCCR.CSS[1:0] bits are set to 11b, the timer functions as a single 16-bit timer with TMR0 occupying

the upper 8 bits and TMR1 occupying the lower 8 bits.

(1) Counter Clear Specification

 The settings of the TMR0.TCR.CCLR[1:0] bits become effective for the 16-bit counter. If the

TMR0.TCR.CCLR[1:0] bits have been set for counter clear at compare match, the 16-bit counter (TMR0.TCNT

and TMR1.TCNT together) is cleared when a 16-bit compare match event occurs. The counter of unit 1 can also be

cleared by the signal on the TMRI2 pin (an external signal to reset the counter).

 The settings of the TMR1.TCR.CCLR[1:0] bits are ignored.

(2) Pin Output

 Control of output from the TMO0 pin by the TMR0.TCSR.OSA[1:0] and OSB[1:0] bits is in accordance with the

16-bit compare match conditions.

 Control of output from the TMO1 pin by the TMR1.TCSR.OSA[1:0] and OSB[1:0] bits is in accordance with the

lower 8-bit compare match conditions. Output from TMR3 in unit 1 is not available since the chip does not have a

pin equivalent to the TMO1 pin for TMR1 of unit 0.

26.5.2 Compare Match Count Mode

When the TMR1.TCCR.CSS[1:0] bits are set to 11b, TMR1.TCNT counts the number of occurrences of compare match

A for TMR0. TMR0 and TMR1 are controlled independently. Conditions such as generation of interrupts, output from

the TMOn pin (n = 0, 1), and counter clear are in accordance with the settings for each channel. Output from TMR3 in

unit 1 is not available since the chip does not have a pin equivalent to the TMO1 pin for TMR1 of unit 0.

Renesas RX Series User Manual

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