Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 81 of 1823
Jul 31, 2019
RX23W Group 2. CPU
2.4.2 Floating-Points
Floating-point support is for the single-precision floating-point type specified in the IEEE754 standard; operands of this
type can be used in eleven floating-point operation instructions: FADD, FCMP, FDIV, FMUL, FSQRT, FSUB, FTOI,
FTOU, ITOF, ROUND, and UTOF.
Figure 2.3 Floating-Point
The floating-point format supports the values listed below.
0 < E < 255 (normal numbers)
E = 0 and F = 0 (signed zero)
E = 0 and F > 0 (denormalized numbers)
*
1
E = 255 and F = 0 (infinity)
E = 255 and F > 0 (NaN: Not-a-Number)
Note 1. The number is treated as 0 when the FPSW.DN bit is 1. When the DN bit is 0, an unimplemented processing
exception is generated.
2.4.3 Bitwise Operations
Five bit-manipulation instructions are provided for bitwise operations: BCLR, BMCnd, BNOT, BSET, and BTST.
A bit in a register is specified as the destination register and a bit number in the range from 31 to 0.
A bit in memory is specified as the destination address and a bit number from 7 to 0. The addressing modes available to
specify addresses are register indirect and register relative.
Figure 2.4 Bit
Single-precision floating-point
S: Sign (1 bit)
E: Exponent (8 bits)
F: Mantissa (23 bits)
Value = (-1)
S
× (1 + F × 2
-23
) × 2
(E-127)
b31 b0
S E F
Register
b31 b0
#bit, Rn
(bit: 31 to 0, n: 0 to 15)
b7
b0
#bit, mem
(bit: 7 to 0)
Memory
Example
Example
#30, R1 (register R1, bit 30)
#2, [R2] (address [R2], bit 2)

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English