R01UH0823EJ0100 Rev.1.00 Page 1345 of 1823
Jul 31, 2019
RX23W Group 38. Serial Peripheral Interface (RSPIa)
38.2.6 RSPI Sequence Control Register (SPSCR)
SPSCR sets the sequence length when the RSPI operates in master mode. When changing the SPSCR.SPSLN[2:0] bits
while both the SPCR.MSTR and SPCR.SPE bits are 1, the bits should be changed while the SPSR.IDLNF flag is 0.
SPSLN[2:0] Bits (RSPI Sequence Length Specification)
The SPSLN[2:0] bits specify a sequence length when the RSPI in master mode performs sequential operations. The RSPI
in master mode changes SPCMD0 to SPCMD7 registers to be referenced and the order in which they are referenced
according to the sequence length that is set in the SPSLN[2:0] bits.
In slave mode, SPCMD0 is referred.
Address(es): RSPI0.SPSCR 0008 8388h
b7 b6 b5 b4 b3 b2 b1 b0
————— SPSLN[2:0]
Value after reset:
00000000
Bit Symbol Bit Name Description R/W
b2 to b0 SPSLN[2:0] RSPI Sequence Length
Specification
b2 b0 Sequence Length Referenced SPCMD0 to SPCMD7 (No.)
0 0 0: 1 0→0→…
0 0 1: 2 0→1→0→…
0 1 0: 3 0→1→2→0→…
0 1 1: 4 0→1→2→3→0→…
1 0 0: 5 0→1→2→3→4→0→…
1 0 1: 6 0→1→2→3→4→5→0→…
1 1 0: 7 0→1→2→3→4→5→6→0→…
1 1 1: 8 0→1→2→3→4→5→6→7→0→…
The order in which the SPCMD0 to SPCMD7 registers are to be
referenced is changed according to the sequence length that is set in
these bits. The relationship among the setting of these bits, sequence
length, and SPCMD0 to SPCMD7 registers referenced by the RSPI is
shown above. However, the RSPI in slave mode references SPCMD0.
R/W
b7 to b3 — Reserved These bits are read as 0. The write value should be 0. R/W
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