R01UH0823EJ0100 Rev.1.00 Page 471 of 1823
Jul 31, 2019
RX23W Group 23. Multi-Function Timer Pulse Unit 2 (MTU2a)
23. Multi-Function Timer Pulse Unit 2 (MTU2a)
In this section, “PCLK” is used to refer to PCLKA.
23.1 Overview
This MCU has an on-chip multi-function timer pulse unit 2 (MTU). Each unit comprises a 16-bit timer with five
channels (MTU0 to MTU4).
Table 23.1 lists the specifications of the MTU, and Table 23.2 lists the functions of the MTU. Figure 23.1 shows a
block diagram of the MTU.
Table 23.1 MTU Specifications
Item Description
Pulse input/output 15 lines max.
Count clocks Eight clocks or seven clocks for each channel
Available operations [MTU0 to MTU4]
Waveform output at compare match
Input capture function (noise filter set function)
Counter clear operation
Simultaneous writing to multiple timer counters (TCNT)
Simultaneous clearing by compare match or input capture
Simultaneous register input/output by synchronous counter operation
A maximum of 11-phase PWM output is available in combination with synchronous
operation
[MTU0, MTU3, MTU4]
Buffer operation specifiable
AC synchronous motor (brushless DC motor) drive mode using complementary PWM
output and reset-synchronized PWM output is settable and the selection of two types
of waveform outputs (chopping and level) is possible.
[MTU1, MTU2]
Phase counting mode specifiable independently
Cascade connection operation
[MTU3, MTU4]
A total of 6-phase waveform output, which includes three phases each for positive and
negative complementary PWM or reset-synchronized PWM output, by interlocking
operation
Complementary PWM mode
Interrupts at the crest and trough of the counter value
A/D converter start triggers can be skipped
Interrupt sources 25 sources
Buffer operation Automatic transfer of register data
Trigger generation A/D converter start trigger can be generated
Low power consumption function Module stop state can be set.
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