R01UH0823EJ0100 Rev.1.00 Page 500 of 1823
Jul 31, 2019
RX23W Group 23. Multi-Function Timer Pulse Unit 2 (MTU2a)
23.2.13 Timer Start Registers (TSTR)
The TSTR registers start or stop the TCNT operation in MTU0 to MTU4.
Before setting the operating mode in the TMDR register or setting the TCNT count clock in the TCR register, be sure to
stop the TCNT counter.
CSTn Bits (Counter Start n) (n = 0 to 4)
Each bit starts or stops the TCNT counter in the corresponding channel.
If 0 is written to the CSTn bit during operation with the MTIOC pin designated for output, the counter stops but the
output compare signal level from the MTIOC pin is retained. If the TIOR register is written to while the CSTn bit is 0,
the pin output level will be changed to the specified initial output value.
Address(es): MTU.TSTR 000D 0A80h
b7 b6 b5 b4 b3 b2 b1 b0
CST4 CST3 — — — CST2 CST1 CST0
Value after reset:
00000000
Bit Symbol Bit Name Description R/W
b0 CST0 Counter Start 0 0: MTU0.TCNT performs count stop
1: MTU0.TCNT performs count operation
R/W
b1 CST1 Counter Start 1 0: MTU1.TCNT performs count stop
1: MTU1.TCNT performs count operation
R/W
b2 CST2 Counter Start 2 0: MTU2.TCNT performs count stop
1: MTU2.TCNT performs count operation
R/W
b5 to b3 — Reserved These bits are read as 0. The write value should be 0. R/W
b6 CST3 Counter Start 3 0: MTU3.TCNT performs count stop
1: MTU3.TCNT performs count operation
R/W
b7 CST4 Counter Start 4 0: MTU4.TCNT performs count stop
1: MTU4.TCNT performs count operation
R/W
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