R01UH0823EJ0100 Rev.1.00 Page 760 of 1823
Jul 31, 2019
RX23W Group 27. Compare Match Timer (CMT)
27.5 Link Operations by ELC
27.5.1 Event Signal Output to ELC
The CMT uses the event link controller (ELC) to perform link operation to a preset module using the interrupt request
signal as the event signal. The CMT outputs the event signal upon a CMT1 compare match.
The event signal can be output regardless of the setting of the corresponding interrupt request enable bit
(CMTn.CMCR.CMIE).
27.5.2 CMT Operation When Receiving an Event Signal from ELC
The CMT can perform either of the following operations upon the event preset by the ELSR7 register of the ELC.
(1) Count Start
When the CMT count start operation is selected by the ELOPC register of the ELC and the event specified by ELSR7
occurs, the CMSTR0.STR1 bit is set to 1, starting the CMT count operation.
However, if the specified event occurs while the CMSTR0.STR1 bit is 1, the event is ignored.
(2) Event Count
When the CMT event count operation is selected by the ELOPC register of the ELC and the event specified by ELSR7
occurs with the CMSTR0.STR1 bit being 1, the events are counted as the count source regardless of the
CMT1.CMCR.CKS[1:0] bit setting. Reading the counter value returns the number of events that have been actually
input.
(3) Count Restart
When the CMT count restart operation is selected by the ELOPC register of the ELC and the event specified by ELSR7
occurs, the CMT1.CMCNT counter value is modified to the initial value. If the CMSTR0.STR1 bit is 1 here, the count
operation can be continued.
27.5.3 Notes on Operating CMT According to an Event Signal from ELC
The following describes the notes on operating the CMT using the event link feature.
(1) Count Start
When the event specified by ELSR7 occurs during the write cycle to the CMSTR0.STR1 bit, the cycle is not completed;
setting 1 according to the event occurrence takes priority.
(2) Event Count
When the event specified by ELSR7 occurs during the write cycle to the CMT1.CMCNT, the cycle is not completed;
event count operation according to the event occurrence takes priority.
(3) Count Restart
When the event specified by ELSR7 occurs during the write cycle to the CMT1.CMCNT, the cycle is not completed;
count value initialization according to the event occurrence takes priority.
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