R01UH0823EJ0100 Rev.1.00 Page 1432 of 1823
Jul 31, 2019
RX23W Group 40. SD Host Interface (SDHIa)
BRE Flag (SDBUFR Read Enable Flag)
— This flag becomes 1 under any of the following conditions:
During a single block transfer, the data size set in the SDSIZE.LEN[9:0] bits is stored in the SD buffer.
During a multi-block transfer, the data size set in the SDSIZE.LEN[9:0] bits is stored in one of the two SD buffers.
— This flag becomes 0 under any of the following conditions:
The bit is set to 0.
DMA transfer is used to read 1 block of data from the SD buffer.
If the CPU is used to read data from the SDBUFR register, set the BRE flag to 0 before reading the data size
*1
set in the
SDSIZE.LEN[9:0] bits. Even if the block of data read contains a CRC error or end bit error, the data is stored in the SD
buffer and the BRE flag becomes 1.
Note 1. If the transfer data size set in the SDSIZE.LEN[9:0] bits is an odd number, the odd numbered byte is ignored.
Refer to section 40.5.2, SDBUFR Register Illegal Write Error for details.
BWE Flag (SDBUFR Write Enable Flag)
— This flag becomes 1 under any of the following conditions:
During a single block transfer, the SD buffer is empty.
During a multi-block transfer, bank 1 or bank 2 of the SD buffer is empty.
— This flag becomes 0 under any of the following conditions:
The flag is set to 0.
DMA transfer is used to write 1 block of data to the SD buffer.
If the CPU is used to write data to the SDBUFR register, set the BWE flag to 0 before writing the data size
*1
set in the
SDSIZE.LEN[9:0] bits.
Note 1. If the transfer data size set in the SDSIZE.LEN[9:0] bits is an odd number, the odd numbered byte is ignored.
Refer to section 40.5.2, SDBUFR Register Illegal Write Error for details.
SDCLKCREN Flag (SDCLKCR Write Enable Flag)
When a value is written to the SDCMD register, the SDHI starts the command sequence, the SDSTS2.CBSY flag
becomes 1, and the SDSTS2.SDCLKCREN flag becomes 0. When the command sequence is complete, after the
SDSTS2.CBSY flag becomes 0, eight cycles of the SDHI clock elapse and then the SDSTS2.SDCLKCREN flag
becomes 1.
ILA Flag (Illegal Access Error Detection Flag)
— This flag becomes 1 under any of the following conditions:
A value is written to the SDCMD register when the SDSTS2.CBSY flag is 1.
The SDCMD.CMDTP bit is set to 1 (command accompanying data transfer), the SDCMD.ACMD[1:0] bits are set
to 00b, and the SDCMD.CMDIDX[5:0] bits are set to 001100b (CMD12).
— This flag becomes 0 under the following condition:
The flag is set to 0.
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