R01UH0823EJ0100 Rev.1.00 Page 236 of 1823
Jul 31, 2019
RX23W Group 11. Low Power Consumption
Low-Speed Operating Mode
A transition to low-speed operating mode is set by writing 1 to the SOPCM bit in the SOPCCR register. The setting of
the OPCM[2:0] bits cannot be modified during low-speed operating mode. This mode is used only for the sub oscillator
of 32.768 kHz.
During reading the flash memory (FLASH), the maximum operating frequency of ICLK, FCLK, PCLKA, PCLKB, and
PCLKD is 32.768 kHz. The operating voltage is in the range of 1.8 to 3.6 V.
The following restrictions apply when low-speed operating mode is selected:
P/E operations for flash memory are prohibited.
The PLL/USB-dedicated PLL, main clock oscillator, LOCO, and HOCO cannot be used.
Note: The SOPCM bit cannot be set to 1 when the PLLCR2.PLLEN bit is 0 (PLL is operating).
The SOPCM bit cannot be set to 1 when the UPLLCR2.UPLLEN bit is 0 (USB-dedicated PLL is operating).
The SOPCM bit cannot be set to 1 when the HOCOCR.HCSTP bit is 0 (HOCO is operating).
The SOPCM bit cannot be set to 1 when the MOSCCR.MOSTP bit is 0 (
main clock oscillator is operating).
The SOPCM bit cannot be set to 1 when the LOCOCR.LCSTP bit is 0 (LOCO is operating).
Figure 11.5 shows the operating voltages and frequencies in low-speed operating mode.
Figure 11.5 Operating Voltages and Frequencies in Low-Speed Operating Mode
[V]
3.6
2.7
2.4
1.8
0.032768 1 4 8 12 16 20 25 32 50 54
ICLK, PCLKA, PCLKD
[MHz]
[V]
3.6
2.7
2.4
1.8
0.032768 1 4 8 12 16 20 25 32 50 54
PCLKB, FCLK
[MHz]
[V]
3.6
2.7
2.4
1.8
0.032768 1 4 8 12 16 20 25 32 50 54
FCLK (P/E only)
[MHz]
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