Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1047 of 1823
Jul 31, 2019
RX23W Group 33. Serial Communications Interface (SCIg, SCIh)
Figure 33.31 shows a sample flowchart for serial data reception.
Figure 33.31 Example Flowchart of Serial Reception in Clock Synchronous Mode
Yes
End
No
Initialization
Start data reception
No
Yes
Set bits RIE and RE in SCR to 0
Error processing
(Continued below)
Read receive data in RDR
No
Yes
SSR.ORER = 1
RXI interrupt
All data received?
Read ORER flag in SSR
End
Error processing
Clear the SSR.ORER flag to 0
Overrun error processing
[ 1 ]
[ 2 ]
[ 3 ]
[ 4 ]
[ 5 ]
[ 3 ]
[ 6 ]
Read the SSR.ORER flag
[ 7 ]
[ 8 ]
[ 1 ] SCI initialization:
Make input port-pin settings for pins to be used
as RXDn pins.
[ 2 ] [ 3 ] Receive error processing:
If a receive error occurs, read the ORER flag in
the SSR register, perform the relevant error
processing, and then set the ORER flag to 0.
Data reception cannot be resumed while the
ORER flag is 1.
[ 4 ] Read the receive data in the RDR register once
in the receive data full interrupt (RXI) request
handling routine.
[ 5 ] Serial reception continuation procedure:
To continue serial reception, before the MSB (bit
7) of the current frame is received, finish reading
the receive data in the RDR register. The RDR
data can also be read by activating the DMAC or
DTC by an RXI interrupt request.
[ 6 ] Processing in response to an overrun error:
Read the RDR register. In combination with step
[ 7 ], this will make correct reception of the next
frame possible.
[ 7 ] Clearing the error flag:
Write 0 to the error flag.
[ 8 ] Confirming that the error flag is cleared:
Read the error flag to confirm that its value is 0.

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English