376 Chapter7
ADC/Interface Section
A3 Assembly Video Circuits
7. If the peak detector appears latched up, check LPOS_RST (U422 pin
4) for a negative TTL level reset pulses. The reset pulses should
occur every 130 µs and should be approximately 250 ns wide.
8. If the reset pulses are absent, troubleshoot the Peak Detector Reset
circuitry.
9. If the reset pulses are present, check the gate of Q207. The pulses
should be positive-going from −12.7 V to −1.35 V.
10.The peak detector can be made into a unity gain amplifier by
shorting the cathode of CR203 to the anode of CR204. If the peak
detector functions normally as a unity gain amplifier, suspect Q208
or CR203 or CR204.
Peak Detector Reset
Refer to function block R of A3 Interface Assembly Schematic
Diagram (sheet 4 of 6) in the
HP 8560 E-Series Spectrum Analyzer
Component Level Information.
1. Press PRESET on the HP 8560E/EC and set the controls as follows:
Center frequency ........................................................ 300MHz
Span ....................................................................................0Hz
Sweep time ............................................................................5s
Detector mode ......................................................... POSPEAK
2. Check that HHOLD (A3U526 pin 11) has 18 µs wide pulses every
128 µs.
3. Check that HODD (U408 pin 5) is a square wave with a period of
16.7 ms (2 × sweep time/600).
4. Check LPOS_RST (U422 pin 4) for 200 ns low-going pulses every
128 µs.
5. Check LNEG_RST (A3U422 pin 12) for 200 ns low-going pulses
every 128 µs.
6. Set the detector mode to NORMAL and check that LNEG_RST
(A3U422 pin 12) has two pulses spaced 40 µs apart and then a single
pulse approximately 88 µs from the second pulse.
7. Check HMUX_SEL0 (A3U408 pin 3) and HMUX_SEL1 (A3U408 pin
9) according to Table 7-8 on page 377.
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