Chapter 11 601
RF Section
A15 RF Assembly
The gain of the Flatness compensation amplifiers is driven to a
minimum by the REDIR line going low during automatic IF
adjustment.
Control Latches
Refer to function block H on A15 RF Section schematic in the HP 8560
E-Series Spectrum Analyzer Component Level Information. The control
latches control the PIN switch drivers illustrated in Function Block I.
1. Connect positive lead of a DVM to A15J901 pin 15 (HEXTMIX).
Connect the negative lead to A15J901 pin 6. The measured signal
controls the switching between internal and external IF signals.
2. On the HP 8560E/EC, press
AUX CTRL and EXTERNAL MIXER. The
voltage on the DVM should measure approximately +5 Vdc (TTL
high).
3. On the HP 8560E/EC, press
AUX CTRL and INTERNAL MIXER. The
voltage on the DVM should measure approximately 0 Vdc (TTL low).
4. Connect the positive lead of a DVM to A15J901 pin 13 (LSID). The
signal measured turns on the SIG ID oscillator (Option 002 only).
5. For Option 002 spectrum analyzers: Press SIG ID ON, SGL SWP.
Subsequent pushes of
SGL SWP should cause the signal measured on
the DVM to toggle between TTL high and low levels.
6. Connect an oscilloscope probe to A15U902 pin 7 (LRDIR) and the
probe ground lead to A15J901 pin 6. The signal measured controls
the flatness compensation circuit.
7. On the HP 8560E/EC, press
PRESET and set the SPAN to 1 MHz.
8. Set the oscilloscope for the following settings:
Amplitude Scale ........................................................2V/div
Sweep Time ........................................................... 20ms/div
9. The waveform should be at a TTL high during part of the retrace
period and a TTL low during the sweep (about 50 ms).
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