378 Chapter7
ADC/Interface Section
A3 Assembly Video Circuits
using the HP 8560E/EC rear panel BLKG/GATE OUTPUT.
8. Check that HPOS_HLDNG (A3U416 pin 4) is mostly high with a 1
MHz video bandwidth and mostly low with a 1 kHz video bandwidth.
9. Check that HNEG_HLDNG (U416 pin 9) is mostly high with a 1
MHz video bandwidth and mostly low with a 1 kHz video bandwidth.
ADC MUX
Refer to function block AA of A3 Interface Assembly Schematic
Diagram (sheet 6 of 6) in the
HP 8560 E-Series Spectrum Analyzer
Component Level Information.
The ADC MUX switches various inputs into the video path for
conversion by the ADC. The SCAN RAMP input is used during sweeps
having a width of equal to or greater than 2.01 MHz times N, to control
the timing of the ADC operations. Some combination of MOD_VIDEO,
NEG_PEAK, and POS_PEAK is used for the video signal to be
converted by the ADC. The YTO ERR, FCMUX, CAL OSC TUNE, and
OFL ERR inputs are used only during diagnostic and auto adjust
routines and during retrace.
1. Set the HP 8560E/EC to the following settings:
Center frequency ..................................................... 300MHz
Span .................................................................................0Hz
Reference level ......................................................... −10dBm
Sweep time ....................................................................... 50s
DETECTOR MODE ................................................SAMPLE
2. Refer to Table 7-9 on page 379 and check for correct logic levels at
A3U108 pins 1, 15, and 16. Check for proper output signals at TP6.
If the select lines are not changing, suspect the ADC ASM or the
VGA/ADC MUX Control. If the select lines are changing, but the
proper video inputs are not being switched to the output, replace
U108. In SAMPLE mode, the input is MOD_VIDEO (pin 7); in POS
PEAK mode, the input is POS_PEAK (pin 5); and in NEG PEAK
mode, the input is NEG_PEAK (pin 6).
3. Check for the presence of the YTO ERR signal at A3J2 pin 42 with
an oscilloscope probe.
4. If ERR 300 YTO UNLK or 301 YTO UNLK occurs and the voltage is
near zero during a sweep and positive during retrace (YTO is being
locked), the fault is on the A3 assembly. If a constant dc voltage is
present, refer to the Synthesizer section troubleshooting procedure
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