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Xilinx Zynq-7000 User Manual

Xilinx Zynq-7000
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Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 287
UG586 November 30, 2016
www.xilinx.com
Chapter 2: QDR II+ Memory Interface Solution
1. Select any of the compatible FPGAs in the list. Only the common pins between the target
and selected FPGAs are used by the MIG tool. The name in the text box signifies the
target FPGA selected.
2. Click Next to display the Memory Selection page.
Creating the 7 Series FPGA QDR II+ SRAM Design
Memory Selection
This page displays all memory types that are supported by the selected FPGA family.
1. Select the QDR II+ SRAM controller type.
2. Click Next to display the Controller Options page
X-Ref Target - Figure 2-15
Figure 2-15: Pin-Compatible 7 Series FPGAs
UG586_c1_10_110610
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Xilinx Zynq-7000 Specifications

General IconGeneral
BrandXilinx
ModelZynq-7000
CategoryMotherboard
LanguageEnglish

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