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Xilinx Zynq-7000 - app_addr[ADDR_WIDTH - 1:0]; app_cmd[2:0]; app_en; app_hi_pri

Xilinx Zynq-7000
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Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 578
UG586 November 30, 2016
www.xilinx.com
Chapter 4: LPDDR2 SDRAM Memory Interface Solution
app_addr[ADDR_WIDTH – 1:0]
This input indicates the address for the request currently being submitted to the UI. The UI
aggregates all the address fields of the external SDRAM and presents a flat address space to
you.
app_cmd[2:0]
This input specifies the command for the request currently being submitted to the UI. The
available commands are shown in Table 4-15.
app_en
This input strobes in a request. You must apply the desired values to app_addr[],
app_cmd[2:0], and app_hi_pri, and then assert app_en to submit the request to the UI.
This initiates a handshake that the UI acknowledges by asserting app_rdy.
app_hi_pri
This input indicates that the current request is a high priority.
app_wdf_data[APP_DATA_WIDTH – 1:0]
This bus indicates which bytes of app_wdf_data[] are written to the external memory and
which bytes remain in their current state. The bytes are masked by setting a value of 1 to the
corresponding bits in app_wdf_mask. For example, if the application data width is 256, the
mask width takes a value of 32. The least significant byte [7:0] of app_wdf_data is masked
using Bit[0] of app_wdf_mask and the most significant byte [255:248] of app_wdf_data
is masked using Bit[31] of app_wdf_mask. Hence if you have to mask the last DWORD, that
is, bytes 0, 1, 2, and 3 of app_wdf_data, the app_wdf_mask should be set to
32'h0000_000F.
app_wdf_end
This input indicates that the data on the app_wdf_data[] bus in the current cycle is the last
data for the current request.
Table 4-15: Commands for app_cmd[2:0]
Operation app_cmd[2:0] Code
Read 001
Write 000
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