Xilinx Zynq-7000 User Manual

Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 538
UG586 November 30, 2016
www.xilinx.com
Chapter 4: LPDDR2 SDRAM Memory Interface Solution
Memory Model License
The MIG tool can output a chosen vendor’s memory model for simulation purposes for
memories such as LPDDR2 SDRAMs. To access the models in the output sim folder, click the
license agreement (Figure 4-26). Read the license agreement and check the Accept License
Agreement box to accept it. If the license agreement is not agreed to, the memory model
is not made available. A memory model is necessary to simulate the design.
X-Ref Target - Figure 4-25
Figure 4-25: Summary
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Xilinx Zynq-7000 Specifications

General

Brand	Xilinx
Model	Zynq-7000
Category	Motherboard
Language	English