44x/EN AP/Hb6
-166 MiCOM P40 Agile
1 – Coherence of 52-A/52-B long enough to raise the alarm
2 – Discrepancy of 52-A/52-B too brief to raise the alarm
3 – Pole dead logic With one opto input 52A
3 – Pole dead logic With one opto input 52A
Figure 134: Circuit breaker state monitoring
5.11.2 DDB Inputs / outputs for CB logic
5.11.2.1 Inputs
• External TripA
• External TripB
• External TripC
From External Protection Devices (via opto inputs) - see General trip logic.
If these optos inputs are assigned to External Trip A, External Trip B and External Trip C
– their change of state will update the CB Operation counter (External trip is integrated in the
DDB: 'Any Trip'. As for an internal trip, no Dwell timer is associated.
• CB aux A(52a)
• CB aux B(52a)
• CB aux C(52a)
• CB aux A(52b)
• CB aux B(52b)
• CB aux C(52b)
If it is assigned to an opto input in the PSL and energised, the DDB: 'CB Aux' signal will be
used for Any pole dead & All pole dead internal logic & Discrepancy logic.
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