Amber . .
Green * *
Blue * .
[...Output truncated...]
Meaning The command output shows that PCG0 is the master because the blue MASTER LED is
on.
Check the PCG LEDs for Mastership on the Faceplate
Purpose To check the PCG LEDs for mastership.
Action To check the PCG LEDs, look on the PCG faceplate at the rear of the M40e or M160 router
chassis.“Check the PCG LED Status on the Faceplate” on page 708 describes the PCG LED
states. If the blue MASTER LED on the PCG faceplate is on steadily, the PCG is functioning
as master.
Display the Packet Forwarding Engine Current Clock Source
Purpose To determine the current clock source of the Packet Forwarding Engine. The Packet
Forwarding Engine current clock source is the master PCG.
Action To display the PCG master from the Packet Forwarding Engine clock source output, use
the following command:
user@host> show chassis clocks
Sample Output
user@host> show chassis clocks
PFE clock status:
Current source PCG 0
Measured frequency 125.03 MHz
Reference clock status:
Current source Primary
Primary source Internal
Secondary source Internal
Tertiary source Internal
Rollover algorithm Holdover
PLL mode Free-running
PLL errors 0
Sync message current 0x00
Sync message normal 0x00
Sync message override 0x00
Meaning The command output shows that the PCG in slot 0 is the primary clock source or master.
Related
Documentation
Checklist for Monitoring Redundant PCGs on page 703•
Display PCG Failure Alarms
Purpose To verify PCG failure by checking the current PCG alarms.
709Copyright © 2012, Juniper Networks, Inc.
Chapter 37: Monitoring Redundant PCGs
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